Edward G. Tiedemann Jr. Distinguished Professor of Electrical and Computer Engineering
Title: Re-Engineering Computing with Neuro-Inspired Learning: Devices, Circuits, and Systems
Date/Time: March. 18 (Mon) 17:00-18:00
Advances in machine learning, notably deep learning, have led to computers matching or surpassing human performance in several cognitive tasks including vision, speech and natural language processing. However, implementation of such neural algorithms in conventional "von-Neumann" architectures are several orders of magnitude more area and power expensive than the biological brain. Hence, we need fundamentally new approaches to sustain exponential growth in performance at high energy-efficiency beyond the end of the CMOS roadmap in the era of ‘data deluge’ and emergent data-centric applications. Exploring the new paradigm of computing necessitates a multi-disciplinary approach. In this talk I will discuss exploration of new learning algorithms inspired from neuroscientific principles, developing network architectures best suited for such algorithms, new hardware techniques to achieve orders of improvement in energy consumption, and nanoscale devices that can closely mimic the neuronal and synaptic operations of the brain leading to a better match between the hardware substrate and the model of computation.
Dr. Roy is the Edward G. Tiedemann Jr. Distinguished Professor of Electrical and Computer Engineering at Purdue University, where he joined the faculty in 1993. He is currently leading the National Center for Brain-inspired Computing Enabling Autonomous Intelligence (C-BRIC) in USA. He was previously with the Semiconductor Process and Design Center of Texas Instruments, Dallas, where he worked on FPGA architecture development and low-power circuit design. He received his Ph.D. degree from the electrical and computer engineering department of the University of Illinois at Urbana-Champaign in 1990. Dr. Roy received the 2005 SRC Technical Excellence Award, the SRC Inventors Award, the Purdue College of Engineering Research Excellence Award, and the 2010 IEEE Circuits and Systems Society Technical Achievement Award. He is a Fellow of the IEEE. His research interests include spintronics, device-circuit co-design for nano-scale silicon and non-silicon technologies, low-power electronics for portable computing and wireless communications, and new computing models enabled by emerging technologies. Dr. Roy has published more than 600 papers in refereed journals and conferences, holds 15 patents, graduated 56 Ph.D. students, and is co-author of two books on low power CMOS VLSI design.
Corporate Vice President,
Strategic Programs, Synopsys
Title: AI Transforming Hardware Design
Date/Time: March. 18 (Mon) 18:00-18:45
Artificial intelligence is well out of its winter. Deep learning, more computing availability and large Data availability have enabled outstanding results in many AI domains. We are seeing tremendous investments in AI development across all industries with high level of expectations. In this talk I will describe why AI is here to stay and evolve in particular how AI will be transforming hardware design and how Synopsys will be playing an important role in supporting AI chip development as well as Synopsys openness of partnership within semi-conductors Industry and other industries.
Chekib is Corporate Vice President, Strategic Programs, responsible for driving artificial intelligence and machine learning strategic initiatives at Synopsys. Chekib joined the company in 2018. He has more than 35 years of experience in semiconductor and microprocessor development. Prior to joining Synopsys, Chekib was with Advanced Micro Devices (AMD) for 10 years. Most recently as Senior Vice President, Global Operations, he led supply chain, procurement, technology development, quality, and platform and product engineering across all AMD business groups. Before that, as Senior Vice President, Infrastructure and Engineering, he oversaw platform and product engineering, design methodology, and IT. In his role as Senior Vice President, Business Transformation, he participated in AMD turnaround. He was also responsible for system architecture research, performance analysis, design packaging, microprocessor core development, and design methodology development.Prior to his tenure at AMD, Chekib served in various VP and GM roles at Freescale Semiconductor (NXP) and IBM. At Freescale, he led the company’s networking system division, a $1.1 billion per-year business. At IBM, he drove the company’s microprocessor development projects.Chekib has a bachelor’s degree in Physics and a Ph.D. in Physics and Electronics.
Computing and Artificial Technology Group, MediaTek,
Title: How Edge AI Technology is Redefining Smart Devices
Date/Time: March. 19 (Tue.) 08:30-09:30
The success of DNNs (Deep Neural Networks) has made AI widely adopted in many real life applications, such as voice assistants, surveillance, healthcare, and transportation. Recently, the growing demand for privacy, short response time, and offline availability creates the trend of processing machine learning tasks locally at the edge. Essentially, DNNs have to pay the cost of high computation complexity and memory usage to achieve good accuracy. In addition, most edge AI applications need the incorporation of more functions like image signal processing, 3D graphics, wireless connectivity and so on. Devices are inherently resource-constrained, especially in memory bandwidth and thermal budget. Therefore, the SoC design of AI-enabled smart devices is very challenging. This talk will discuss the trends in addressing edge AI technology challenges to make smart devices truly intelligent.
Dr. Ryan Chen is the General Manager of the Computing and AI Technology Group at MediaTek. Dr. Chen is responsible for essential technology development such as AI, GPU and computing systems. Currently, he is leading the establishment of the MediaTek NeuroPilot solution that has enabled a powerful Edge-AI core technology for a wide range of MediaTek products.
Previously, Dr. Chen led the development of MediaTek CorePilot, the exclusive thermal and power control technology. It enabled the world’s first heterogeneous multi-core mobile SoC achieving the best balance of performance and energy efficiency. CorePilot has been widely used in most MediaTek mobile SoCs that now power hundreds of millions of mobile devices worldwide.
In a previous role, Dr. Chen was the General Manager of MediaTek Digital TV business unit. He made crucial contributions to MediaTek’s global leading position in the TV SoC industry.
Vice President & Director
Mitsubishi Electric Research Labs (MERL)
Title: Edge Intelligence for Optimized Systems & High-Performance Devices
Date/Time: March. 20 (Wed.) 08:30-09:30
The combination of IoT sensing, edge computing and AI algorithms is creating new opportunities to use real-time data to optimize system capabilities and increase device performance. In the manufacturing domain, edge intelligence allows us to realize various forms of anomaly detection, predict the lifetime or maintenance schedule of components, and adaptive learn improved control policies. Connected cars will benefit from edge intelligence to improve safety and optimize traffic flows. Additionally, the parameters of a circuit can be automatically tuned using data-driven machine learning techniques to increase efficiency and performance. This presentation will highlight the numerous benefits of the edge intelligence framework, and identify several open challenges and issues.
Dr. Vetro is a Vice President and Director at Mitsubishi Electric Research Labs, in Cambridge, Massachusetts. He is currently responsible for AI related research in the areas of computer vision, speech/audio processing, and data analytics. In his 20+ years with the company, he has contributed to the transfer and development of several technologies to Mitsubishi products, including digital television receivers and displays, surveillance and camera monitoring systems, automotive equipment, as well as satellite imaging systems. He has published more than 200 papers and has been an active member of the MPEG and ITU-T video coding standardization committees for a number of years, serving as Head of the US Delegation to MPEG (2011-2014), and as the Chair of the US Technical Advisory Group to ISO/IEC JTC 1/SC 29 (2015-2018). He is also active in various IEEE conferences, technical committees and editorial boards. He currently serves on the Conference Board of the IEEE Signal Processing Society. Past roles include Senior Editorial Board of IEEE Journal on Selected Topics in Signal Processing and IEEE Journal on Emerging and Selected Topics in Circuits and Systems, Editorial Board of IEEE Signal Processing Magazine and IEEE Multimedia, Associate Editor of IEEE Transactions on Circuits and Systems for Video Technology and IEEE Transactions on Image Processing, Chair of TC on Multimedia Signal Processing of the IEEE Signal Processing Society, and Steering Committee of IEEE Transactions on Multimedia. He was a General Co-Chair of ICIP 2017 and ICME 2015 , and also served as a Technical Program Co-Chair for ICME 2016. Dr. Vetro received the B.S., M.S. and Ph.D. degrees in Electrical Engineering from Polytechnic University, in Brooklyn, NY (now NYU Tandon School of Engineering). He has received several awards for his work on transcoding and is a Fellow of the IEEE.